13th January! Finally the most awaited date has arrived! This is the date on which our "Millenniour Professor" has decided to have our final Analog CMOS presentation. I worked with Saket in this project and Saket did most of the work in the design! Our design met all the specs except SNR and which is missed by only 0.8 dB! Even after meeting all the specs, I realize that something was missing. And looking into other group's presentation, I evaluated our project to be 8/10. Now, waiting for the final results to come, this will take probably 1-2 week.
After the CMOS presentation, I went to 17th Floor lab and decided to start on assignment of methods and algorithm for system design. I have read all the background knowledge needed for the assignment, but unfortunately MATLAB is not working properly on my system. So, I have to go to course lab tomorrow to finish the assignment.
Enough for the day.
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